KD 6.700

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About this item.
Support 1.5V,1.8V,2.5V,3.5V and 5.0V,Support WindowsXP, Windows Vista, Windows7 system, USB interface Support AS, PS and JTAG program ( with Verify and BankCheck function) , CPLD：MAX3000、MAX7000、MAX9000 和MAXII 等　 FPGA：Stratix、StratixII、StratxIII、Cyclone、CycloneII、CycloneIII、CycloneIV、ACEX1K、APEX20K&FLEX10K Support AS, PS and JTAG program ( with Verify and BankCheck function) . Support NIOS II communication and debugger-- When you use it to debug your Black Gold , it will not Pop-up warning Faster -- about 6 times than ByteblasterII.

1. Support 1.5V,1.8V,2.5V,3.5V and 5.0V. 2. Support all ALTERA products : CPLD ( MAX3000, MAX7000, MAX9000 and MAX II ) ; FPGA ( Stratix, StratixII, Cyclone, CycloneII, ACEX 1K, APEX20K and FLEX 10K ) ;Active serial configuration device (EPCS1, EPCS4, EPCS16) ---- Now we have tested chip using this tool is: Cyclone (EP1C3, EP1C6, EP1C12, EP1C20) ; Cyclone II (EP2C5, EP2C8, EP2C35) ; Stratix (EP1S10, EP1S20, EP1S25) ; Stratix II(EP2S60) ; FLEX10K(EPF10K10, EPF0K30) ; ACEX1K(EP1K30) ; MAX7000(MAX7128SLC84, MAX7128) ; AETC100(MAX3000, MAX3128) ; MAXII(MAXII240, MAXII570, MAXII1270) ; EPCS(EPCS1, EPCS4, EPCS16) ; EPC(EPC1, EPC4) 3. Support AS, PS and JTAG program ( with Verify and BankCheck function) . ---- When we tested the chip above , we use the different program mode: JTAG ( Cyclone, CycloneII, Stratix II, Flex10K, Acex1K, Max7000 and Max3000) ; AS ( EPCS1, EPCS4, EPCS16 ) ; PS ( Stratix , Stratix GX ) 4. Support embedded logic analyzer function of SignalTapII 5. Support NIOS II communication and debugger-- When you use it to debug your Black Gold , it will not Pop-up warning 6. Faster -- about 6 times than ByteblasterII 7. USB interface ! -- you don\'t need a PC with serial port now

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Lexiesxue USB Blaster Rev.C Universal Edition FPGA CPLD programmer Download line download cable

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